High Level Assembler - Opcodes overview, Vector Extension Set A6

The table below lists all documented opcodes in extension set A6 for IBM mainframe processors. Each opcode links to a text section with some additional info on the pertinent opcode.

Opcode Assignments.

Remark:
Please note that the creation of descriptions for all individual instructions is an ongoing process. As yet no such descriptions have been created for the opcodes on this page.

Extension Set A6 - Vector Facility

All instructions in this table are four bytes in length. The first byte always has a value of X'A6', the second byte designates the exact instruction.

All entries in this table have a slightly darker background because the entire extension set is no longer supported on either current mainframe hardware or by IBM's current version of HLASM. The associated mnemonics are printed in italics.

A6 _0 _1 _2 _3 _4 _5 _6 _7 _8 _9 _A _B _C _D _E _F
0_ VMXSE VMNSE VMXAE           VLELE VXELE            
1_ VMXSD VMNSD VMXAD           VLELD VXELD VSPSD VZPSD        
2_                 VLEL VXEL            
3_                                
4_ VTVM VCVM VCZVM VCOVM VXVC VLVCU VXVMM   VRRS VRSVC VRSV          
5_                                
6_                                
7_                                
8_ VLVM VLCVM VSTVM   VNVM VOVM VXVM                  
9_                                
A_                                
B_                                
C_ VSRSV VMRSV VSRRS VMRRS VLVCA VRCL VSVMM VLVXA VSTVP   VACSV VACRS        
D_                                
E_                                
F_                                

 

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